Model-order reduction using variational balanced truncation with spectral shaping

2007 Asia and South Pacific Design Automation Conference, 2007

As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these systems increases, reduced order modeling becomes critical. In this paper, we develop a new method for the model order reduction of interconnect using frequency restrictive selection of interpolation points based on the spectral-zeros of the RLC interconnect model's transfer function. The methodology uses the imaginary part of spectral zeros for frequency selective projection and provides stable as well as passive reduced order models for interconnect in VLSI systems. For large order interconnect models with realistic RLC parameters, the results indicate that our method provides more accurate approximations than techniques based on balanced truncation and moment matching with excellent agreement with the original system's transfer function.

Electronics

Modeling and design of on-chip interconnect, the interconnection between the components is becoming the fundamental roadblock in achieving high-speed integrated circuits. The scaling of interconnect in nanometer regime had shifted the paradime from device-dominated to interconnect-dominated design methodology. Driven by the expanding complexity of on-chip interconnects, a passivity preserving model order reduction (MOR) is essential for designing and estimating the performance for reliable operation of the integrated circuit. In this work, we developed a new frequency selective reduce norm spectral zero (RNSZ) projection method, which dynamically selects interpolation points using spectral zeros of the system. The proposed reduce-norm scheme can guarantee stability and passivity, while creating the reduced models, which are fairly accurate across selected narrow range of frequencies. The reduced order results indicate preservation of passivity and greater accuracy than the other mod...

Lecture Notes in Electrical Engineering, 2011

In this document we review the status of existing techniques for nonlinear model order reduction by investigating how well these techniques perform for typical industrial needs. In particular the TPWL-method (Trajectory Piecewise Linear-method) and the POD-approach (Proper Orthogonal Decomposion) is taken under consideration. We address several questions that are (closely) related to both the theory and application of nonlinear model order reduction techniques. The goal of this document is to provide an overview of available methods together with a classification of nonlinear problems that in principle could be handled by these methods.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006

This paper presents a novel compact passive modeling technique for high-performance RF passive and interconnect circuits modeled as high-order resistor-inductorcapacitor-mutual inductance circuits. The new method is based on a recently proposed general s-domain hierarchical modeling and analysis method and vector potential equivalent circuit model for self and mutual inductances. Theoretically, this paper shows that s-domain hierarchical reduction is equivalent to implicit moment matching at around s = 0 and that the existing hierarchical reduction method by one-point expansion is numerically stable for general tree-structured circuits. It is also shown that hierarchical reduction preserves the reciprocity of passive circuit matrices. Practically, a hierarchical multipoint reduction scheme to obtain accurate-order reduced admittance matrices of general passive circuits is proposed. A novel explicit waveform-matching algorithm is proposed for searching dominant poles and residues from different expansion points based on the unique hierarchical reduction framework. To enforce passivity, state-space-based optimization is applied to the model order reduced admittance matrix. Then, a general multiport network realization method to realize the passivity-enforced reduced admittance based on the relaxed one-port network synthesis technique using Foster's canonical form is proposed. The resulting modeling algorithm can generate the multiport passive SPICE-compatible model for any linear passive network with easily controlled model accuracy and complexity. Experimental results on an RF spiral inductor and a number of high-speed transmission line circuits are presented. In comparison with other approaches, the proposed reduction is as accurate as passive reduced-order interconnect macromodeling algorithm in the high-frequency domain due to the enhanced multipoint expansion, but leads to smaller realized circuit models. In addition, under the same reduction ratio, realized models by the new method have less error compared with reduced circuits by time-constant-based reduction techniques in time domain.

IEEE International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2021

Second-order formulation using susceptance elements has become very effective in modeling on-chip inductive couplings. Several prior works have proposed model order reduction techniques for RLCK circuits, mostly based on balanced truncation (BT) and moment matching, providing reduced-order models (ROMs) that can be simulated over the whole frequency range. However, in most applications, the ROMs are simulated only at specific frequency windows, which means that established methods usually provide models that may become unnecessarily large to achieve approximation over all frequencies. In this paper, we present a second-order frequency-limited approach for RLCK circuits, which may be combined with efficient low-rank Lyapunov solvers, leading to ROMs which are either smaller or exhibit better accuracy compared to an established second-order BT method. Experimental results on interconnect bus structures demonstrate the advantages of the proposed method. Index Terms-model order reduction (MOR), balanced truncation (BT), circuit simulation, second-order systems.

2007

Model order reduction plays a key role in determining VLSI system performance and the optimization of interconnects. In this paper, we develop an accurate and provably passive method for model order reduction using adaptive wavelet-based frequency selective projection. The waveletbased approach provides an automated means to generate low order models that are accurate in a particular range of frequencies.

2022 European Control Conference (ECC), 2022

Theory and methods to obtain reduced order models by moment matching from input/output data are presented. Algorithms for the estimation of the moments of linear and nonlinear systems are proposed. The estimates are exploited to construct families of reduced order models. These models asymptotically match the moments of the unknown system to be reduced. Conditions to enforce additional properties, e.g. matching with prescribed eigenvalues, upon the reduced order model are provided and discussed. The computational complexity of the algorithms is analyzed and their use is illustrated by two examples: we compute converging reduced order models for a linear system describing the model of a building and we provide, exploiting an approximation of the moment, a nonlinear planar reduced order model for a nonlinear DC-to-DC converter.

Lecture Notes in Electrical Engineering, 2011

In this paper, we discuss the present and future needs of the electronics industry with regard to model order reduction. The industry has always been one of the main motivating fields for the development of MOR techniques, and continues to play this role. We discuss the search for provably passive methods, as well as passivity enforcement methods that are currently being developed. Structure preservation is another important research topic, for which new concepts are being developed. This also holds for the calculation of delays in long interconnect lines, a topic that leads to an entirely new type of methods. Topics that are still in their infancy are model order reduction for parameterized and nonlinear problems. We will discuss what the needs of the industry are in all of these fields, show specific applications and what has been achieved so far. The paper is meant as a guideline for future research, not as a detailed survey of existing methods.

2011

Ever since its beginnings in the 1950’s, the integrated circuit (IC) has profoundly changed our lives. The way we work, travel, communicate, or address medical problems today has been facilitated by advances in microelectronics, which permit more functionality to be built on the same silicon area, at decreasing cost. As the feature size of devices on a chip shrink and circuits operate at increasing frequencies, the electromagnetic coupling effects between different IC components can no longer be ignored. To understand their impact on chip performance, these so called parasitic effects must be simulated. Parasitic networks are often so large, that state of the art simulation tools are insufficient to handle them: the simulations are either too lengthy, or cannot be carried out at all. The mathematical reason behind this is that the underlying systems are too large to be solved with the numerical algorithms implemented in simulation software. Model order reduction (MOR) provides one a...

Automatica, 2014

A new frequency weighted technique for balanced model reduction is proposed. The proposed technique not only provides stable reduced order models for the case when both input and output weightings are included but also yields frequency response error bounds. The method is illustrated using numerical examples and the results are compared with other frequency weighted model reduction techniques.