Investigation of a Wideband BiCMOS Fully On-Chip $W$-Band Bowtie Slot Antenna

—This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for wireless personal area networks (WPANs) promise to reduce interconnec-tion losses and greatly reduce wireless transceiver costs, while providing unprecedented flexibility for device manufacturers. This paper presents the current state of research in on-chip integrated antennas, highlights several pitfalls and challenges for on-chip design, modeling, and measurement, and proposes several antenna structures that derive from the microwave microstrip and amateur radio art. This paper also describes an experimental test apparatus for performing measurements on RFIC systems with on-chip antennas developed at The University of Texas at Austin.

International Journal of Rf and Microwave Computer-aided Engineering, 2013

A new millimeter-wave antenna structure on a low-cost, production platform integrated passive device technology is presented. The antenna consists of a 2-by-1 array of slot antennas at 60 GHz. An in-house developed on-chip antenna measurement setup was used to characterize the fabricated antenna. The measurement results show an antenna gain of more than 5 dBi with a return loss of 18 dB at 60 GHz. The better-than-10-dB impedance bandwidth of the antenna covers the 60-GHz unlicensed band from 57 to 64 GHz. The 3-dB beamwidths of the antenna are 105 and 76 at E-plane and H-plane at 60 GHz, respectively. The size of the die of the antenna is 2 mm 3 4.5 mm. V

In this paper, a novel Asymmetrical Coplanar Waveguide (ACPW) fed monopole antenna is presented. The proposed antenna has a 2:1VSWR bandwidth of 400MHz at 5.8GHz with an Omni-directional coverage. The uniplanar and compact structure and simple feeding mechanism make it easy to implement in Monolithic Microwave Integrated Circuits. The antenna operates in ISM band and can be used for various wireless applications.

2016 IEEE Middle East Conference on Antennas and Propagation (MECAP), 2016

In this paper, we present a micromachined dipole antenna with parasitic radiator. The antenna is designed for operation at 60 GHz. It consists of two g /2 dipole radiators fed by coplanar strips waveguide. Two slightly shorter dipoles are placed in proximity to the main radiators. They act as parasitic dipole arms which increase the bandwidth of the antenna. Two versions of the same antenna topology are presented in this paper in which one uses a high resistivity silicon substrate while the other uses a low resistivity one. The proposed antenna was optimized using HFSS and the final design was simulated using both HFSS and CST for verifying the obtained results. Both simulators are in good agreement. They show that the antenna has very good radiation characteristics where its directivity is around 7.5 dBi. The addition of the parasitic arms increased the bandwidth of the antenna from 1.3 GHz (3.62 GHz) to 4.3 GHz (7.44 GHz) when designed on high (low) resistivity silicon substrate.

2010

Progress In Electromagnetics Research B

This paper presents a CPW-fed, UWB-extended bandwidth, dual band-notched on-chip antenna with its equivalent circuit model. The UWB-extended bandwidth is realized by truncating the bottom corners of a rectangular patch radiator while a 90 •-rotated 'C'-shaped slot in the patch and a 'U'-shaped slot in the feedline are used to achieve two notch bands for mitigating the signal interference in the frequency bands of 5.15 to 5.925 GHz and 7.9 to 8.8 GHz. Based on the fundamental theory, different parasitic as well as distributed circuit parameters associated with the designed on-chip antenna are extracted, and then the corresponding equivalent circuit model is configured from them. The resultant circuit is validated with the well approved full-wave electromagnetic simulation result and is found in close approximation with each other.

Microwave Systems and Applications, 2017

The 60-GHz band has a 7-GHz of bandwidth enabling high data rate wireless communication. Also, it has a short wavelength allowing for passive devices integration into a chip, that is, fully integrated system-on-chip (SOC) is possible. This chapter features the design, implementation, and measurements of 60-GHz on-chip antennas (OCAs) on complementary-metal-oxide-semiconductor (CMOS) technology. OCAs are the primary barrier for the SOC solution due to their limited performance. This degraded performance comes from the low resistivity and the high permittivity of the CMOS substrate. We present here two innovative techniques to improve the CMOS OCAs' performance. The first method utilizes artificial magnetic conductors to shield the OCA electromagnetically from the CMOS substrate. The second methodology employs the PN-junction properties to create a high resistivity layer. Both approaches target the mitigation of the losses of the CMOS substrate; hence, the radiation performance characteristics of the OCAs are enhanced.

IEEE Antennas and Wireless Propagation Letters, 2019

A novel hybrid integration strategy for compact, broadband and highly efficient mmWave on-chip antennas is demonstrated by realizing a hybrid on-chip antenna, operating in the [27.5-29.5] GHz band. A cavity-backed stacked patch antenna is implemented on a 600 µm-thick silicon substrate by using airfilled substrate-integrated-waveguide technology. A hybrid onchip approach is adopted in which the antenna feed and an air-filled cavity are integrated on chip and the stacked patch configuration is implemented on a high frequency PCB laminate that supports the chip. A prototype of the hybrid on-chip antenna is validated, demonstrating an impedance bandwidth of 3.7 GHz. In free-space conditions, a boresight gain of 7.3 dBi and a front-to-back ratio of 20.3 dB at 28.5 GHz are achieved. Moreover, the antenna is fabricated using standard silicon fabrication techniques and features a total antenna efficiency above 90 % in the targeted frequency band of operation. The high performance, in combination with the compact antenna footprint of 0.49 λmin × 0.49 λmin, makes it an ideal building block to construct broadband antenna arrays with a broad steering range.

IEEE Transactions on Electron Devices, 2005

The feasibility of integrating antennas and required circuits to form wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction between transmitted and received signals, and nearby circuits appear to be manageable. This technology can potentially be applied for implementation of a true single-chip radio for general purpose communication, on-chip and inter-chip data communication systems, RFID tags, RF sensors/radars, and others.

IOP Conference …, 2011

The design and RF characteristics of planar dipole antennas facilitated with coplanar waveguide (CPW) structure on semi-insulated GaAs are performed and confirmed to work in super high frequency (SHF) range. As expected, the fundamental resonant frequency shifts to higher frequency when the length of antenna decreases. Interestingly, the resonant frequencies of antenna are almost unchanged with the variation of antenna width and metal thickness. It is shown experimentally that return loss down to-54 dB with a metal thickness of 50 nm is obtainable. Preliminary investigation on design, fabrication, and DC and RF characteristics of the integrated device (planar dipole antenna + Schottky diode) on AlGaAs/GaAs HEMT structure is presented. From the preliminary direct irradiation experiments using the integrated device, the Schottky diode is not turned on due to weak reception of RF signal by dipole antenna. Further extensive considerations on the polarization of irradiation etc. need to be carried out in order to improve the signal reception. These preliminary results provide a new breakthrough for on-chip electronic device application in nanosystems.

Applied Sciences

In this work, the impact of substrate type and design dimensions on bow-tie microstrip antenna performance and bandwidth improvement is presented both numerically and experimentally at 4–8 GHz. The finite integration technique (FIT)-based high-frequency electromagnetic solver, CST Microwave Studio, was used for the simulation analysis. For this purpose, four bow-tie microstrip antennas were designed, fabricated, and measured upon using different materials and substrate thicknesses. Precise results were achieved and the simulated and experimental results showed a good agreement. The performance of each antenna was analyzed and the impact of changing material permittivity, antenna dimensions and substrate thicknesses on antenna performance were investigated and discussed. The measured results indicated that the slot bow-tie antenna, which is one of the novel aspects of this study, is well matched and a 2-GHz bandwidth [5–7 GHz] is obtained, which is about 50% bandwidth in comparison w...

Scientific Reports

A MM-loaded sub-THz on-chip antenna with a narrow beamwidth, 9 dB gain and a simulated peak efficiency of 76% at the center frequency of 300 GHz is presented. By surrounding the antenna with a single MM-cell ring defined solely on the top metal of the back-end of line, an efficient suppression of the surface waves is obtained. The on-chip antenna has been designed using IHPs 130 nm SiGe BiCMOS technology with a 7-layer metallization stack, combined with the local backside etching process aimed to creating an air cavity which is then terminated by a reflective plane. By comparing the measured MM-loaded antenna performances to its non-MM-loaded counterpart, an enhanced integrity of the main lobe due to the MM-cells shielding effect can be observed. An excellent agreement between the simulated and measured performances has been found, which makes the MM-loaded antennas a valid alternative for the upcoming next-generation sub-THz transceivers.

IEEE Transactions on Antennas and Propagation, 2017

Fig. 1. Illustration of the proposed single CMOS-die active MMID tag that uses a harvested energy from an incoming mmW signal from the reader.

2012 6th European Conference on Antennas and Propagation (EUCAP), 2012

A dual-band bow-tie slot antenna is proposed and designed for the 900 and 2400 MHz ISM bands. Using Rogers 4003C substrate ( r = 3.55) with a thickness of 1.6 mm, the antenna is produced and tested. A comparison is made between measured and simulated data from both a Method of Moments and Finite-Element method software packages. By using a parabolic curve to form the sides of the bow-tie slot, the new antenna integrates features from a Vivaldi antenna into its design. Using these features, the antenna achieves dual-band operation while maintaining an omni-directional pattern similar to a normal bow-tie slot. The parabolic sides of this bow-tie slot antenna offers an additional design element for other CPW fed slot antenna designs.

2012 6th European Conference on Antennas and Propagation (EUCAP), 2012

A high-gain and small-area triangular monopole Antenna-on-Chip (AOC), designed using a standard CMOS process and optimized over a modified rectangular Artificial Magnetic Conductor (AMC). The rectangular AMC acts as a shield between the AOC and the lossy CMOS substrate. Using this configuration, a Frequency Selective Surface (FSS) is realized by the shield providing high wave impedance around 60 GHz. The AOC dimensions including the AMC are 0.86 mm by 1.76mm. The antenna gain is 0.3 to 1 dBi from 57 to 64 GHz.