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2005
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13 pages
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This paper presents the design and analysis of a novel distributed CMOS mixer for ultrawide-band (UWB) receivers. To achieve the UWB RF frequency range required for the UWB communications, the proposed mixer incorporates artificial in- ductance-capicitance ( ) delay lines in radio frequency (RF), local oscillator (LO), and intermediate frequency signal paths, and single-balanced mixer cells that are distributed along these circuits. Closed-form analytical model for the conversion gain of the mixer is presented. Furthermore, a comprehensive noise analysis of the proposed distributed mixer is carried out, which includes calculation of the mixer noise figure (NF) and derivation of the optimum number of stages, , minimizing the NF. The designed mixer is capable of covering the RF and LO frequencies over a wide range of frequencies from 3.1-8.72 GHz. A two-stage distributed mixer has been fabricated in a 0.18- m CMOS process. Experiments show a conversion gain of more than 2.5 dB for the...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2005
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Journal of Electron Devices, 2012
It is also essential to realize the mixer with reasonable linearity, so that the impact of mixing with the external interferers can be minimized. For the mixer circuit, IIP3, IIP2 are the important design parameters to measure the linearity besides the conversion gain and noise figure [3]. ...
This paper presents the design of a 3.1-10.6 GHz down-conversion mixer for ultra-wideband (UWB) system with 0.18 μm SMIC CMOS technology. The mixer with an active balun was fabricated in the 0.18 μm IP6M standard CMOS process. The broadband mixer with an active balun achieve a conversion gain of 16 ± 0.1 dB and 7.6 -11.8 dB on a double-sideband (DSB) noise figure. It also achieved an input thirdorder intercept point (IIP3) of -1.89 to -1.8 dBm. The mixer with active balun consumed 17.3 mW from a 1.2 V supply. This circuit did not match S11,or S33 to save chip area.
Proceedings of 2011 International Conference on Electronic & Mechanical Engineering and Information Technology, 2011
This letter presents a low power, low noise CMOS double-balanced direct conversion mixer for ultra-wideband systems. The mixer is a critical block to perform the frequency translation in ultra-wideband systems. The proposed mixer employs three techniques: the sub threshold operation of transistors for the radio frequency stage reduces current dissipation in the overall mixer, a local oscillation (LO) stage using an inverter lowers the required LO amplitude, and an active load improves conversion gain. The mixer was implemented using a 0.18 um CMOS process and was operated from 3.1 to 5.7 GHz. The measured results show a high conversion gain up to 22.0 dB and a maximum noise figure of 8.0 dB.In addition and a power dissipation of 5.535 mW from a 1.8 V supply.
2013 IEEE International Wireless Symposium (IWS), 2013
A low-power, highly linear CMOS doublebalanced mixer for UWB applications is presented. The mixer is designed based on well-known folded architecture and also benefits from DC isolation of RF (Radio Frequency) and LO (Local Oscillator) stages. Stacked NMOS-PMOS g m-boosting topology is used in the design of RF stage. To achieve very low power consumption, this stage is biased in sub-threshold region. Also an ultra-wideband active balun is designed and fabricated to generate differential inputs. The balun is separately characterized and its performance is reported both separately and together with the mixer. The design is implemented using 130 nm CMOS process and is operational from 3.1 to 10.6 GHz. The measured maximum conversion gain shows high value of 14.9 dB for the mixer core. Also, the measured double sideband noise figure has a minimum value of 7.8 dB for the mixer core and 12.9 dB when balun is added. Input (RF and LO) port matching is achieved with reflection of more than 10 dB for the entire band. Furthermore, port-toport isolation is measured that shows excellent isolation between ports. Measured IIP3 as a good indication of linearity performance is also reported and shows excellent linearity that is a result of techniques used in the design. Finally the mixer core area is measured to be 0.056 mm 2 with power dissipation of 623 µW from a 1.2 V supply.
IEICE Transactions on Electronics, 2005
This paper represents a high performance wideband CMOS direct down-conversion mixer for UWB based on 0.18 µm CMOS technology. The proposed mixer uses the current bleeding technique and an extra resonant inductor to improve the conversion gain, noise figure (NF) and linearity. Also, with an extra inductor and the careful choosing of transistor sizes, the mixer has a very low flicker noise. The shunt resistor matching is applied to have a 528MHz bandwidth matching at 50 Ohm. The simulation results show the voltage conversion gain of 20.5 dB, the double-side band NF of 5.6 dB. Two-tone test result indicates 11.25 dBm of IIP3 and higher than 70 dBm of IIP2. The circuit operates at the supply voltage of 1.8 V, and dissipates 11.5 mW.
2013
In this paper, a CMOS down-conversion mixer for UWB applications is presented. The mixer circuit is designed using a VIS 0.25μm RF CMOS technology, working at the 0.9GHz-10.6GHz frequency range; it will be used in applications such as IEEE WiFi, GSM and WiMAX. The core of the mixer has been designed based on double-balanced cell architecture, and uses the current bleeding method to increase the linearity and improve the conversion gain. We put a resistor on the drain of the MOS between two RF inputs, which will improve the flatness of conversion gain. Regarding the arrangement of the mixer, the RF frequency is set at 0.9GHz-10.6GHz, the LO frequency 0.8GHz-10.5GHz and the IF of 100MHz. The simulated conversion gain of the mixer is 7± 1dB. The 1dB compression point is higher than-11dBm at high frequency and-9dBm at low frequency. The RF input return loss is well below-11dB, and the LO input return loss is below-10dB. The noise figure is 12.93dB while IF is 100MHz, and the mixer core dissipates 9.8mW under a 1.8 V supply.
A new fully differential ultra low-voltage, ultra low-power down-converter mixer for ultra wideband application is presented in this paper. This mixer is designed using four-terminal MOS transistors. The radio frequency is applied to source and local-oscillator signal is applied to the gate with body of devices simultaneously. A DTMOS common source amplifier is employed increasing conversion gain. The proposed circuit is designed and simulated in the TSMC 0.18μm CMOS process. The simulation results show that the proposed mixer has a peak conversion gain of 12.3dB with 3dB RF frequency bandwidth from 2GHz to 10.5GHz with a fixed IF frequency of 100MHz. The third-order intermodulation-intercept point (IIP3) varies from -5.2dBm to -7.3dBm between 2-10.5GHz. The proposed mixer consumes only 1.28mW power with 0.5V supply voltage.
TELKOMNIKA Telecommunication Computing Electronics and Control, 2019
A multi-section coupled-line balun design for an ultra-wideband diode mixer is presented in this paper. The multi-section coupled-line balun was used to interface with the diode mixer in which it can deliver a good impedance matching between the diode mixer and input/output ports. The mixer design operates with a Local Oscillator (LO) power level of 10 dBm, Radio Frequency (RF) power level of-20 dBm and Intermediate Frequency (IF) of 100 MHz with the balun characteristic of 180° phase shift over UWB frequency (3.1 to 10.6 GHz), the mixer design demonstrated a good conversion loss of-8 to-16 dB over the frequency range from 3.1 to 10.6 GHz. Therefore, the proposed multi-section coupled-line balun for application of UWB mixer showed a good isolation between the mixer's ports.
2009
This work presents low noise amplifier (LNA) and mixer with an active Balun for 8-9 GHz Ultra-wideband (UWB) system. The LNA uses the self-biased method to eliminate the Miller effect and no extra bias circuit is needed. The mixer uses the Gilbert cell topology to enhance the isolation performance. The proposed mixer which uses an active balun at the input port reveals a larger conversion gain than by using a micromixer topology which varies the signals at the transconductance stage. The LNA and mixer are also integrated together on a printed circuit board (PCB). Fabricated in CMOS 0.18μm technology, the conversion gain of LNA and mixer is 17.4dB when one IF port is terminated to 50Ω. The total power consumption is 41.4dBm, the LO-to-IF isolation is 35.6dB, and the 1-dB compression point is -20dBm.
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