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2011, IEEE Journal of Solid-State Circuits
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13 pages
1 file
A W-band direct-detection-based receiver front-end for millimeter-wave passive imaging in a 0.18-m BiCMOS process is presented. The proposed system is comprised of a direct-detection front-end architecture employing a balanced LNA with an embedded Dicke switch, power detector, and baseband circuitry. The use of a balanced LNA with an embedded Dicke switch minimizes front-end noise figure, resulting in a great imaging resolution. The receiver chip achieves a measured responsivity of 20-43 MV/W with a front-end 3-dB bandwidth of 26 GHz, while consuming 200 mW. The calculated NETD of the SiGe receiver chip is 0.4 K with a 30 ms integration time. This work demonstrates the possibility of silicon-based system-on-chip solutions as lower cost alternatives to compound semiconductor multi-chip imaging modules.
A W-band direct-detection-based receiver front-end for millimeter-wave passive imaging in a 0.18m BiCMOS process is presented. The proposed system is comprised of a direct-detection front-end architecture employing a balanced LNA with an embedded Dicke switch, power detector, and baseband circuitry. The use of a balanced LNA with an embedded Dicke switch minimizes front-end noise figure, resulting in a great imaging resolution. The receiver chip achieves a measured responsivity of 20-43 MV/W with a front-end 3-dB bandwidth of 26 GHz, while consuming 200 mW. The calculated NETD of the SiGe receiver chip is 0.4 K with a 30 ms integration time. This work demonstrates the possibility of silicon-based system-on-chip solutions as lower cost alternatives to compound semiconductor multi-chip imaging modules.
2010
Abstract A fully-integrated silicon-based 94-GHz direct-detection imaging receiver with on-chip Dicke switch and baseband circuitry is demonstrated. Fabricated in a 0.18-μm SiGe BiCMOS technology (f T/f MAX= 200 GHz), the receiver chip achieves a peak imager responsivity of 43 MV/W with a 3-dB bandwidth of 26 GHz. A balanced LNA topology with an embedded Dicke switch provides 30-dB gain and enables a temperature resolution of 0.3-0.4 K. The imager chip consumes 200 mW from a 1.8-V supply.
2009
A W-band square-law detector was implemented in a commercial SiGe 0.12μm BiCMOS process (IBM8HP, f t = 200 GHz) and was integrated with a SiGe LNA and SPDT switch. The combined LNA+Detector is 0.26 mm 2 , achieves a peak responsivity of ~4 MV/W at 94 GHz with a minimum NEP < 0.02 pW/Hz 1/2 , and consumes 29 mA from a 1.2 V supply. A low-loss W-band SPDT is also integrated on some designs for an internal 50 Ω reference. The chip can achieve a temperature resolution of 0.3-0.4 K with a 30 ms integration time and ~ 20 GHz bandwidth. This represents, to our knowledge, the first W-band SiGe passive mm-wave imaging chip with state-of-the-art temperature sensitivity.
IEEE Journal of Solid-State Circuits, 2012
This paper presents a chip-set aiming at high resolution imaging systems for people screening applications operating near the W-band. The center frequency of operation is 78GHz with a 3-dB bandwidth of at least 7GHz for optimal image resolution and depth of focus. The frequency generation for both receive and transmit chips consists of a frequency quadrupler consisting of 2 cascaded active Gilbert mixers. The receiver RFIC contains 4 channels including LO generation and distribution. The measured receiver conversion gain is 23dB with a SSB NF below 10dB over a wide frequency range from 70GHz up to 82GHz. The transmitter RFIC includes LO generation, distribution and 4 output amplifiers with an output power of more than 0 dBm in a frequency range from 77GHz to 85GHz. Both receiver and transmitter ICs are supplied from a single 3.3V supply voltage and the power consumption per channel is below 160mW.
This paper presents a W-band receiver chipset for passive millimeter-wave imaging in a 65 nm standard CMOS technology. The system comprises a direct-conversion receiver front-end with injection-locked tripler and a companion analog back-end for Dicke radiometer. The receiver design addresses the high 1/f noise issue in the advanced CMOS technology. An LO generation scheme using a frequency tripler is proposed to lower the PLL frequency, making it suitable for use in multi-pixel systems. In addition, the noise performance of the receiver is further improved by optimum biasing of transistors of the detector in moderate inversion region to achieve the highest responsivity and lowest NEP. The front-end chipset exhibits a measured peak gain of 35 dB, 3 dB BW of 12 GHz, NF of 8.9 dB, while consuming 94 mW. The baseband chipset has a measured peak responsivity ( ) of 6 KV/W and a noise equivalent power (NEP) of 8.54 pW Hz 1 2 . The two chipsets integrated on-board achieve a total responsivity of 16 MV/W and a calculated Dicke NETD of 1K with a 30 ms integration time.
2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010
This paper presents the analysis, design and implementation of a millimeter-wave W-band power detector. Fabricated in a 0.18-ȝm SiGe BiCMOS technology, the detector circuit exhibits a responsivity of 91 kV/W, a noise equivalent power of 0.5 pW/Hz 1/2 , and a noise figure of 29 dB. The power dissipation of the detector is 75 ȝW. Reasonable agreement between simulations and measurements is obtained. To the authors' best knowledge, the detector in this work achieves the highest responsivity reported to date for any solid-state W-band detector.
We describe a novel low noise amplifier (LNA) fabricated in silicon germanium with a narrow bandwidth at 95 GHz with high gain and medium output power. The amplifier will be used as the part of the front end receiver in a passive millimeter wave (mmW) imager based on optical up-conversion. This allows for a highly sensitive, real-time, and economical millimeter wave imaging system.
SBMO/IEEE MTT-S International Conference on Microwave and Optoelectronics, 2005., 2005
ABSTRACT
Microwave and Optical Technology Letters, 2015
This letter presents the results of a broadband intermediate frequency (IF) section radio frequency integrated circuit designed for a W-band heterodyne radiometer receiver in a 0.13 lm SiGe BiC-MOS process. The differential IF section which consists of an amplifier and a power detector uses inductive and resistive matching to obtain a wideband response. The IF amplifier has a measured gain of 10.0-19.5 dB at 2-37 GHz, noise figure of 6-8 dB at 1-26 GHz, and OIP 3 of 7-17 dBm at 1-40 GHz. The detector has a measured responsivity of 1 kV/W and an estimated noise equivalent power (NEP) of 4-6 pW/Hz 1/2 at 5-35 GHz, respectively. For the IF section, the input return loss is better than 10 dB at 7-40 GHz and the responsivity is 10-82 kV/W at 5-35 GHz. The broadband properties over significantly wider bandwidths than earlier reported silicon-based IF amplifier and power detector circuits make the SiGe 5-35 GHz IF section suitable for W-band directconversion radiometer receiver Radio Frequency Integrated Circuits with a larger predetection bandwidth and improved sensitivity.
International Journal of Microwave and Wireless Technologies, 2011
A 160-GHz SiGe-HBT (Heterojunction Bipolar Transistor) down-conversion receiver front-end for use in active millimeter-wave imaging arrays and D-band communication applications is presented. The monolithic front-end consists of a three-stage low-noise amplifier providing 24 dB of gain and a Gilbert-cell mixer capable of operating from a −8-dBm LO signal. A fully differential architecture compatible with balanced on or off-chip antennas is used to avoid the need for on-chip baluns in antenna-integrated applications. The implemented downconversion front-end consumes 50 mA from a 3.3 V supply and requires a 0.1 mm2 die area (excl. pads) per channel. With a 160-GHz input signal and an Intermediate Frequency (IF) of 1 GHz, the implemented front-end yields a 25-dB conversion gain, a −30-dBm input compression point, and a 9-dB/7-dB (with/without auxiliary on-chip input balun) system noise figure.
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