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2014, IEEE Transactions on Antennas and Propagation
2012 IEEE International Workshop on Antenna Technology (iWAT), 2012
The paper presents several feasible millimeter wave on-chip antenna designs suitable to be fabricated in CMOS technology without any additional process. The results are listed and compared with state-of-the-art designs in the literature. The difficulties in designing high efficiency antenna on CMOS chip are discussed.
Scientific Reports, 2022
A MM-loaded sub-THz on-chip antenna with a narrow beamwidth, 9 dB gain and a simulated peak efficiency of 76% at the center frequency of 300 GHz is presented. By surrounding the antenna with a single MM-cell ring defined solely on the top metal of the back-end of line, an efficient suppression of the surface waves is obtained. The on-chip antenna has been designed using IHPs 130 nm SiGe BiCMOS technology with a 7-layer metallization stack, combined with the local backside etching process aimed to creating an air cavity which is then terminated by a reflective plane. By comparing the measured MM-loaded antenna performances to its non-MM-loaded counterpart, an enhanced integrity of the main lobe due to the MM-cells shielding effect can be observed. An excellent agreement between the simulated and measured performances has been found, which makes the MM-loaded antennas a valid alternative for the upcoming next-generation sub-THz transceivers.
Proceedings of the 4th Wseas International Conference on Electronics Hardware Wireless and Optical Communications, 2005
Future high-performance wireless communication applications such as wireless local area networks (WLANs) around 5GHz require low power and high quality integrated transceiver solutions. The integration of RF front-end especially poses a great challenge to these applications as traditional system on chip (SOC) approach is quite inefficient. A system on package approach can address the problems in an optimum way. In this paper we present a comparison of different passive element fabrication choices. These passives are to be fabricated between different modules on an MCM-D substrate. Inductors and capacitors are compared on the bases of their Q-factors and SRF (self resonance frequency). RF receiver module for 5GHz wireless LAN applications is implemented using benzocyclobutene (BCB) as interlayer material.
IEEE Antennas and Wireless Propagation Letters, 2000
ABSTRACT Design and implementation of a W-band on-chip bowtie-shaped slot antenna fabricated in 180-nm BiCMOS process is presented, and its performance and limitations are discussed. This antenna has a measured impedance bandwidth (S-11 < -10 dB) across the -band frequency range and a very wide gain bandwidth, making it a candidate for wideband applications. The measured gain for this antenna is 0-1 dBi at 94 GHz. This letter also analyzes the influence of the RF probe to the on-chip antenna performance.
IEEE Access, 2022
Antennas on-chip are a particular type of radiating elements valued for their small footprint. They are most commonly integrated in circuit boards to electromagnetically interface free space, which is necessary for wireless communications. Antennas on-chip radiate and receive electromagnetic (EM) energy as any conventional antennas, but what distinguishes them is their miniaturized size. This means they can be integrated inside electronic devices. Although on-chip antennas have a limited range, they are suitable for cell phones, tablet computers, headsets, global positioning system (GPS) devices, and WiFi and WLAN routers. Typically, on-chip antennas are handicapped by narrow bandwidth (less than 10%) and low radiation efficiency. This survey provides an overview of recent techniques and technologies investigated in the literature, to implement high performance on-chip antennas for millimeter-waves (mmWave) and terahertz (THz) integrated-circuit (IC) applications. The technologies discussed here include metamaterial (MTM), metasurface (MTS), and substrate integrated waveguides (SIW). The antenna designs described here are implemented on various substrate layers such as Silicon, Graphene, Polyimide, and GaAs to facilitate integration on ICs. Some of the antennas described here employ innovative excitation mechanisms, for example comprising open-circuited microstrip-line that is electromagnetically coupled to radiating elements through narrow dielectric slots. This excitation mechanism is shown to suppress surface wave propagation and reduce substrate loss. Other techniques described like SIW are shown to significantly attenuate surface waves and minimise loss. Radiation elements based on the MTM and MTS inspired technologies are shown to extend the effective aperture of the antenna without compromising the antenna's form factor. Moreover, the on-chip antennas designed using the above technologies exhibit significantly improved impedance match, bandwidth, gain and radiation efficiency compared to previously used technologies. These features make such antennas a prime candidate for mmWave and THz on-chip integration. This review provides a thorough reference source for specialist antenna designers. The associate editor coordinating the review of this manuscript and approving it for publication was Davide Ramaccia .
… . Proceedings of the …, 1998
A 0.25-pm modular High-Engery Implanted Complementary BiCMOS (HEICBiC) technology has been developed for wireless-communication VLSIs. The technology demonstrates a high fT=52 GHz and a high fTBVcEO=160 GHz-V for single-poly emitter NPN transistors and a high fT=10.7 GHz for implantedemitter PNP transistors. It is one of the best results for single-poly BiCMOShipolar technologies without an epitaxial buried collector. In comparison with 0.25-pm NMOS, HEICBiC shows lower power consumption and higher RF performance.
Proceedings of the 1998 Bipolar/BiCMOS Circuits and Technology Meeting (Cat. No.98CH36198), 1998
A 0.25-pm modular High-Engery Implanted Complementary BiCMOS (HEICBiC) technology has been developed for wireless-communication VLSIs. The technology demonstrates a high fT=52 GHz and a high fTBVcEO=160 GHz-V for single-poly emitter NPN transistors and a high fT=10.7 GHz for implantedemitter PNP transistors. It is one of the best results for single-poly BiCMOShipolar technologies without an epitaxial buried collector. In comparison with 0.25-pm NMOS, HEICBiC shows lower power consumption and higher RF performance.
Facta universitatis - series: Electronics and Energetics, 2010
In this work we propose novel integrated antennas for chip-to-chip wireless interconnects. In order to save chip area, the available CMOS circuit ground planes can be used as radiating elements. The interference between the integrated antennas and the on-chip circuit interconnects should be minimised. This can be obtained by introducing a transformer in the antenna feeding network.
Microwave Systems and Applications, 2017
The 60-GHz band has a 7-GHz of bandwidth enabling high data rate wireless communication. Also, it has a short wavelength allowing for passive devices integration into a chip, that is, fully integrated system-on-chip (SOC) is possible. This chapter features the design, implementation, and measurements of 60-GHz on-chip antennas (OCAs) on complementary-metal-oxide-semiconductor (CMOS) technology. OCAs are the primary barrier for the SOC solution due to their limited performance. This degraded performance comes from the low resistivity and the high permittivity of the CMOS substrate. We present here two innovative techniques to improve the CMOS OCAs' performance. The first method utilizes artificial magnetic conductors to shield the OCA electromagnetically from the CMOS substrate. The second methodology employs the PN-junction properties to create a high resistivity layer. Both approaches target the mitigation of the losses of the CMOS substrate; hence, the radiation performance characteristics of the OCAs are enhanced.
IEEE Transactions on Electron Devices, 2005
The feasibility of integrating antennas and required circuits to form wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction between transmitted and received signals, and nearby circuits appear to be manageable. This technology can potentially be applied for implementation of a true single-chip radio for general purpose communication, on-chip and inter-chip data communication systems, RFID tags, RF sensors/radars, and others.
—This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for wireless personal area networks (WPANs) promise to reduce interconnec-tion losses and greatly reduce wireless transceiver costs, while providing unprecedented flexibility for device manufacturers. This paper presents the current state of research in on-chip integrated antennas, highlights several pitfalls and challenges for on-chip design, modeling, and measurement, and proposes several antenna structures that derive from the microwave microstrip and amateur radio art. This paper also describes an experimental test apparatus for performing measurements on RFIC systems with on-chip antennas developed at The University of Texas at Austin.
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2011
As great advancements have been made in CMOS process technology over the past 20 years, RF CMOS circuits operating in the microwave band have rapidly developed from component circuit levels to multiband/multimode transceiver levels. In the next ten years, it is highly likely that the following devices will be realized: (i) versatile transceivers such as those used in software-defined radios (SDR), cognitive radios (CR), and reconfigurable radios (RR); (ii) systems that operate in the millimeterwave or terahertz-wave region and achieve high speed and large-capacity data transmission; and (iii) microminiaturized low-power RF communication systems that will be extensively used in our everyday lives. However, classical technology for designing analog RF circuits cannot be used to design circuits for the abovementioned devices since it can be applied only in the case of continuous voltage and continuous time signals; therefore, it is necessary to integrate the design of high-speed digital circuits, which is based on the use of discrete voltages and the discrete time domain, with analog design, in order to both achieve wideband operation and compensate for signal distortions as well as variations in process, power supply voltage, and temperature. Moreover, as it is thought that small integration of the antenna and the interface circuit is indispensable to achieve miniaturized micro RF communication systems, the construction of the integrated design environment with the Micro Electro Mechanical Systems (MEMS) device etc. of the different kind devices becomes more important. In this paper, the history and the current status of the development of RF CMOS circuits are reviewed, and the future status of RF CMOS circuits is predicted. key words: RF, CMOS, transceiver, integrated circuit, MEMS, future Kazuya Masu received the B.E., M.E. and
IEEE Antennas and Wireless Propagation Letters, 2013
Design and implementation of a -band on-chip bowtie-shaped slot antenna fabricated in 180-nm BiCMOS process is presented, and its performance and limitations are discussed. This antenna has a measured impedance bandwidth ( dB) across the -band frequency range and a very wide gain bandwidth, making it a candidate for wideband applications. The measured gain for this antenna is 0-1 dBi at 94 GHz. This letter also analyzes the influence of the RF probe to the on-chip antenna performance.
2014 44th European Microwave Conference, 2014
This paper presents a small size 60 GHz Antennaon-Chip (AoC) designed and fabricated using 0.18 um TSMC Complementary Metal Oxide Semiconductor (CMOS) process. AoC performance is enhanced using asymmetric Artificial Magnetic Conductor (AMC). The AoC area including the AMC is 1715 um by 710 um. As AMC shields AoC from the lossy CMOS substrate, simulated gain of -0.25 dBi is achieved at 60 GHz for design rule compatible circular AoC with 12.8 dB frontto-back ratio (FBR) due to removal of AMC cells below the AoC. Measurements agree well with simulation results and confirm operation at the 60 GHz band with a peak measured gain of -3 dBi at 64 GHz.
The integration of a CMOS power amplifier (PA) and antenna in printed circuit-board (PCB) technology is investigated. Both the PA and the antenna have a differential design to provide a reliable low-loss interconnect. A PCB package is proposed that enables the implementation of a high-efficiency antenna while providing mechanical rigidity. The interconnection between the PA and the antenna is realised with flip-chip technology. The performance of the package is demonstrated with measurements of the realised antenna gain and radiation patterns.
Electronics
This paper presents the design of a high-performance 0.45–0.50 THz antenna on chip (AoC) for fabrication on a 100-micron GaAs substrate. The antenna is based on metasurface and substrate-integrated waveguide (SIW) technologies. It is constituted from seven stacked layers consisting of copper patch–silicon oxide–feedline–silicon oxide–aluminium–GaAs–copper ground. The top layer consists of a 2 × 4 array of rectangular metallic patches with a row of subwavelength circular slots to transform the array into a metasurface. This essentially enlarges the effective aperture area of the antenna. The antenna is excited using a coplanar waveguide feedline that is sandwiched between the two silicon oxide layers below the patch layer. The proposed antenna structure reduces substrate loss and surface waves. The AoC has dimensions of 0.8 × 0.8 × 0.13 mm3. The results show that the proposed structure greatly enhances the antenna’s gain and radiation efficiency, and this is achieved without compromi...
2002
Most applications for radio frequency/microwave (thereafter called RF) transistors had been military oriented in the early 1980s. Recently, this has been changed drastically due to the explosive growth of the markets for civil wireless communication systems. This paper gives an overview on the evolution, current status, and future trend of transistors used in RF electronic systems. Important background, development and major milestones leading to modern RF transistors are presented. The concept of heterostructure, a feature frequently used in RF transistors, is discussed. The different transistor types and their figures of merit are then addressed. Finally an outlook of expected future developments and applications of RF transistors is given.
Solid-State Circuits, IEEE Journal of, 1999
This paper discusses design issues and the microwave properties of CMOS devices. A qualitative understanding of the microwave characteristics of MOS transistors is provided. The paper is directed toward helping analog IC circuit designers create better front-end radio-frequency CMOS circuits. The network properties of CMOS devices, the frequency response, and the microwave noise properties are reviewed, and a summary of the microwave scaling rules are presented.
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